1. Field of the Invention
The invention relates to a process for evaluating a measuring capacitance in accordance with the preamble of claim 1, as well as to a circuit arrangement for implementing this process.
2. Description of the Related Art
A process for measuring a capacitance is known, e.g., from DE 34 13 849 A1 and from DE 35 44 187 A1. In the first of these publications, FIG. 1 shows a circuit arrangement for measuring a capacitance, in which the capacitance is maintained permanently at a reference potential by an electrical connection and the other connection is switched between a reference voltage source and an integrator. The circuit contains an integrating device, which is connected to an operating voltage and exhibits an operational amplifier. The integrating device is charged with the charge of the capacitance being measured and is then discharged by means of a circuit device lying parallel to an integrating capacitor. The characteristics of the recharging process are a measure of the capacitance being measured.
The second publication describes a capacitance measuring circuit which also exhibits a switching arrangement, one that applies a constant voltage to the measuring capacitance, with a predetermined switching frequency which changes periodically for the purpose of charging, and for the purpose of discharging connects the measuring capacitance to a storage capacitor, whose capacitance is large compared to the measuring capacitance. The terminal voltage of the storage capacitor is basically held to a constant reference potential by a controlled discharge current. In contrast to the first publication, the measure of the capacitance being examined is not the recharging frequency, but the magnitude of the discharge current in proportion to the measuring capacitance.
A process for measuring the capacitance of capacitive sensors is also known from DE 42 37 196 C1. A connection for the capacitance being measured, i.e., for the measuring capacitor, is firmly attached to a reference potential, ideally the measuring potential of the entire configuration. Attaching a connection for the capacitance being measured to the reference potential is advantageous when the sensor is employed in undefined, variable conditions with respect to capacitance, for example, as caused by variable surface moisture or electrical couplings that create interference. Here the measuring capacitor electrode that faces the housing, or the medium under investigation, is kept at a constant potential. The other electrode of the measuring capacitor in this known circuit arrangement is connected, in a manner that permits switching, to the entrance of an integrating device that exhibits an integrating capacitor. The capacitance being measured is first charged in a charging phase by a predetermined potential difference, and then, in a discharging phase, the charge thus stored is recharged to the integrating capacitor of the integrating device and is evaluated there. In the process, the connection of the capacitance being measured that is not in contact with the reference potential is attached, in both the charging phase and the discharging phase, to a reference potential which is set to a different value in the charging phase than in the discharging phase. With a working voltage potential thus changing periodically, circuit arrangement capacitances that falsify the data are neutralized, and small capacitance values or changes can be evaluated with a high degree of accuracy.
The change-over of the operating voltage potential remains problematic in these known processes, however, and this can lead to difficulties, most of all when the circuit arrangement is realized as an application-specific integrated circuit (ASIC) in CMOS technology, since here the different operational voltage potentials must be controlled on a single ASIC substrate.
To be sure, the measurement of a capacitance in a case where one connection is firmly attached to the reference potential is characterized by a lower sensitivity to other interference effects; however, it is disadvantageous because of the inclusion of parasitic capacitances lying parallel to the precision capacitor. Such parasitic capacitances are not stable over time, nor are they stable with respect to temperature, and this also compromises the measuring results. Finally, resistances lying parallel to the precision capacitor also influence the measuring results. Although highly resistive, these parallel resistances arise due to surface coatings on sensor ceramic substrates, as caused by moisture in the air.
In this connection, DE 43 40 472 C1 proposes a process and a circuit arrangement for measuring the capacitance of a precision capacitor, where one connection is firmly attached to the reference potential; the arrangement can be realized on a single ASIC substrate and allows interference effects caused by parallel resistances to be reduced. The publication specifies a process for measuring a capacitance whose first connection is attached to the reference potential; an integrating device is employed which is connected to an operating voltage and which exhibits a integrating capacitor that is charged with the charge of the capacitance being measured and is then discharged, such that the recharging frequency represents a measure of the capacitance under investigation and such that the integrating capacitor in each case is charged and discharged up to a predetermined reference threshold, and at the beginning of the charging or discharging event negative or positive charging surges with equal amplitudes are transferred to the integrating capacitor by coupling with the capacitance (CM).